The present invention relates generally to integrated circuits, and more particularly to a counter circuit for counting electronic events.
A counter is a logic circuit used for counting the number of times a particular event (e.g., a rising clock edge) occurs with respect to a clock signal. For example, an 8-bit counter having a sequence of eight registers (e.g., flip-flops) can count up to 256 clock cycles before rolling over. In many high-frequency applications, it is desirable to provide counters that count accurately and with low power consumption.
Conventional counters are either synchronous or asynchronous. Conventional synchronous counters can count accurately, but consume relatively high power because each register consumes dynamic power during each clock cycle whether or not the register toggles.
Conventional asynchronous counters consume relatively low power, but may be inaccurate at high clock frequencies due to the accumulation of the clock-to-q delays of the individual registers. For a given frequency, there is a maximum number of bits that can be configured in an asynchronous counter and still provide accurate counting. Reciprocally, for a given number of bits in an asynchronous counter, there is a maximum frequency at which the asynchronous counter can count accurately.